Introduction

The mainstream fabrication method for graphene relies on copper-foil-based CVD growth combined with wet transfer processes. Although technically mature, this approach has inherent limitations. The transfer procedure inevitably introduces wrinkles, holes, and interfacial contamination, severely degrading the intrinsic electrical properties of graphene. Furthermore, copper substrates exhibit high chemical activity and are incompatible with the in-situ epitaxial growth of 2D materials such as MoS₂ and WS₂, greatly restricting the integration and application of graphene-based heterojunction devices.
Based on relevant research published in ACS Omega, this blog focuses on the core application value of single-crystal sapphire substrates. It elaborates on the multi-cycle CVD method for the direct layer-by-layer growth of monolayer, bilayer, and trilayer graphene on sapphire surfaces. Unlike traditional substrates that merely support thin films, sapphire substrates precisely regulate graphene nucleation, van der Waals epitaxy, film crystallinity, and interfacial adhesion, fundamentally solving the drawbacks of conventional processes. Combined with full experimental characterization figures, this article systematically analyzes the advantages of sapphire substrates, process optimization mechanisms, and performance improvements of graphene electronic devices.

1. Sapphire Substrate: The Optimal Insulating Substrate for Direct Multilayer Graphene Growth

1.1 Critical Drawbacks of Traditional Copper Foil Substrates

Copper foil-based CVD catalyzed growth is the dominant industrial method for graphene preparation. However, graphene grown on copper must be peeled off via PMMA-assisted wet transfer before device fabrication, which brings three irreversible defects:
First, poor interfacial adhesion. Transferred graphene films tend to form bubbles, gaps, and wrinkles on target substrates, damaging film continuity and interfacial flatness. Second, high defect density. Mechanical stretching, solution immersion, and residual impurities during transfer significantly increase structural defects, raise Raman D peaks, and cause sharp attenuation of carrier mobility. Third, poor process compatibility. Metallic copper reacts with precursors of sulfur-based 2D materials, prohibiting the in-situ integration of graphene with other 2D materials and limiting the fabrication of high-quality heterojunction devices.

1.2 Unique Core Advantages of Sapphire Substrates

As a typical single-crystal insulating substrate, sapphire (Al₂O₃) features excellent high-temperature stability, chemical inertness, ultra-flat surface, and favorable lattice matching, making it ideal for in-situ multilayer graphene growth. Its core advantages are summarized as follows:
In-situ growth without transfer. Graphene is directly deposited on sapphire without peeling or transferring, achieving ultra-clean interfaces and strong film adhesion. Subsequent epitaxial growth of MoS₂ and other 2D materials can be performed directly on graphene, completely eliminating transfer-induced defects. Wafer-scale scalable fabrication. Using ethane (C₂H₆) as the carbon source, continuous, uniform, and defect-free graphene films can be grown on full-size sapphire wafers, satisfying industrial mass production requirements. Van der Waals epitaxy support. Graphene has no surface dangling bonds. The atomically flat sapphire surface provides a stable nucleation platform for the first graphene layer. Supported by the rigid sapphire substrate, the bottom graphene layer acts as a high-quality template for van der Waals epitaxy, effectively improving atomic ordering and crystallinity of upper graphene layers.

1.4 Process Challenges Brought by Sapphire Substrates

Graphene and sapphire possess significantly different thermal expansion coefficients. After high-temperature growth at 1050 °C, mismatched thermal shrinkage during cooling produces uniform wrinkles on graphene surfaces. Although these wrinkles do not break the continuity of monolayer graphene, they act as preferential nucleation sites for carbon clusters during secondary high-temperature CVD growth, causing local aggregation and degradation of film uniformity. This mismatch is the core challenge that must be optimized for cyclic multilayer graphene growth.

2. Full Process of Cyclic CVD Growth of Monolayer and Bilayer Graphene on Sapphire Substrates

2.1 First-Cycle CVD: Standard Growth Process of Monolayer Graphene on Sapphire

The experiment was carried out in a 1-inch quartz tube furnace. The sapphire wafer was placed in the central constant-temperature zone. Precise growth parameters were set as follows: growth temperature of 1050 °C, base pressure of 10 Torr, mixed gas flow rates of 300 sccm Ar (carrier gas), 50 sccm H₂ (etching amorphous carbon), and 5 sccm C₂H₆ (carbon source). The growth duration was 60 minutes to obtain high-quality monolayer graphene.

[Figure 1: SEM comparison of graphene on sapphire after single and double high-temperature CVD cycles]
 
Figure 1a shows the SEM morphology after a single CVD cycle. A complete and continuous monolayer graphene film was formed on the sapphire surface with only sporadic tiny carbon clusters, presenting excellent film quality. Uniform surface wrinkles originated entirely from thermal expansion mismatch between graphene and sapphire during cooling.
Figure 1b presents the sample after secondary growth at 1050 °C with the pressure increased to 50 Torr. A large number of micron-scale dense carbon particles appeared on the primary graphene surface, accompanied by severe aggregation and coalescence of graphene flakes. The film uniformity was completely destroyed and unsuitable for device fabrication. At high temperatures, dangling-bond-free graphene flakes are prone to phase separation. Since sapphire only provides mechanical support without altering graphene’s intrinsic interfacial properties, targeted parameter optimization is essential to match the sapphire–graphene system.
 

2.2 Optimized Secondary Growth Process Adapted to Sapphire Substrates

To address graphene wrinkling, flake aggregation, and carbon cluster precipitation caused by sapphire substrate characteristics, three key parameters were optimized to match the sapphire–graphene interface:
First, temperature reduction for defect suppression. The secondary growth temperature was decreased from 1050 °C to 950 °C, narrowing the thermal expansion mismatch and inhibiting high-temperature graphene flake migration and aggregation. Second, pressure adjustment for controlled nucleation. The chamber base pressure was raised to 50 Torr to shorten the mean free path of carbon radicals and suppress large carbon particle nucleation. Third, increased hydrogen flow for impurity elimination. The H₂ flow rate was increased from 50 sccm to 200 sccm. Hydrogen neutralizes excessive active carbon radicals and effectively inhibits amorphous carbon deposition.

[Figure 2: SEM images of bilayer graphene grown at 950 °C with different H₂ flow rates]
 
Figure 2a shows the sample grown at 950 °C with 50 sccm H₂. Although carbon clusters were significantly reduced compared with high-temperature processes, residual particles still aggregated along graphene wrinkles induced by sapphire cooling, leading to local inhomogeneity. Figure 2b shows the optimized sample grown at 950 °C with 200 sccm H₂. The density of carbon clusters was greatly reduced, and wrinkle-associated aggregation was effectively alleviated. Large-area, uniform, low-defect bilayer graphene was successfully grown on the sapphire substrate.

3. Multi-Dimensional Characterization of Layer-Controllable Graphene on Sapphire Substrates

3.1 Determination of Graphene Layers via Transmission Spectroscopy

Monolayer graphene has a fixed optical absorption of approximately 2% across the 500–800 nm visible range with wavelength-independent absorption, enabling accurate layer identification. The single-cycle CVD sample exhibited 2%–3% optical absorption, confirming high-quality monolayer graphene. The optimized double-cycle sample showed increased absorption of 3%–4%, consistent with the superposition principle of bilayer graphene, verifying successful bilayer growth.

3.2 Raman Spectroscopy Verification of Improved Crystallinity via Sapphire Epitaxy

[Figure 3: Raman and transmission spectra of monolayer and bilayer graphene]
 
Raman spectroscopy is the core characterization method for graphene defect density and layer number identification. Comparative results show that the 2D/G peak ratio decreased from 1.08 (monolayer) to 0.85 (bilayer), which matches the typical Raman evolution of multilayer graphene and confirms layer increment. Meanwhile, the D/G defect ratio decreased slightly from 0.39 to 0.34, indicating reduced defect density.
The underlying mechanism is as follows: the first graphene layer grown on ultra-flat sapphire possesses low defect density and serves as a high-quality van der Waals epitaxial template. Supported by the flat and rigid sapphire interface, the secondary graphene layer achieves improved atomic ordering and reduced structural defects, strongly proving that sapphire substrates are essential for high-quality bilayer graphene growth.

3.3 Cross-Sectional HRTEM Observation of Layered Structures

[Figure 4: Cross-sectional HRTEM morphology of monolayer, bilayer, and trilayer graphene]
 
High-resolution transmission electron microscopy (HRTEM) clearly resolved atomic carbon layers under a 2 nm scale bar. The single-cycle sample displayed a single carbon layer corresponding to monolayer graphene. The double-cycle sample presented two parallel stacked carbon layers, confirming uniform bilayer graphene. Triple-cycle CVD growth successfully achieved trilayer graphene.
Nevertheless, a technical limitation was observed: after three high-temperature growth cycles, the interfacial adhesion between multilayer graphene and the sapphire substrate decreased significantly, resulting in film peeling and warping. Future work will develop low-temperature graphene growth processes to improve interfacial stability between multilayer graphene and sapphire.

4. Device Performance Enhancement of Graphene Transistors Based on Sapphire Substrates

[Figure 5: Fabrication process and transfer curves of graphene bottom-gate transistors] 

4.1 Standard Device Fabrication Process

To evaluate electrical performance, graphene grown on sapphire was transferred onto 300 nm SiO₂/p-Si substrates for bottom-gate transistor fabrication. The detailed procedure is as follows: first, spin-coat PMMA protective layer on graphene and cure at 120 °C for 5 minutes to enhance mechanical strength; second, peel off the PMMA/graphene composite film in deionized water; third, capture the floating film with target substrates and remove PMMA residues via acetone immersion; fourth, fabricate 100 nm Au source/drain electrodes through photolithography and metal lift-off, and define graphene channels of 5 μm × 150 μm via reactive-ion etching (RIE).

4.2 Comparative Analysis of Electrical Performance

Under the standard test condition of V_DS = 1.0 V, the calculated electrical parameters show significant performance improvement. Monolayer graphene transistors exhibited hole/electron mobilities of 108/43 cm²V⁻¹s⁻¹. In contrast, bilayer graphene transistors grown via sapphire-supported van der Waals epitaxy achieved hole/electron mobilities of 358/146 cm²V⁻¹s⁻¹, more than a threefold enhancement. Meanwhile, bilayer graphene devices presented prominently higher saturation drain current.
The performance improvement originates from the low-defect primary graphene template provided by the sapphire substrate. The van der Waals epitaxy mechanism optimizes the crystallinity of upper graphene layers, reduces structural defects, suppresses carrier scattering, and ultimately realizes remarkable enhancement in transistor electrical performance.

5. Summary

Sapphire single-crystal substrates fundamentally overcome the inherent limitations of copper-based graphene, including mandatory transfer processes, high defect density, and poor material compatibility. Featuring insulation stability, high-temperature tolerance, chemical inertness, and ultra-flat surfaces, sapphire enables a recyclable, in-situ, and scalable multilayer graphene growth system. By optimizing CVD temperature, chamber pressure, and hydrogen flow to match sapphire’s thermal and interfacial characteristics, wafer-scale, uniform, and low-defect monolayer and bilayer graphene can be stably synthesized. Bilayer graphene grown via sapphire-supported van der Waals epitaxy exhibits superior crystallinity and carrier mobility, showing great potential for high-performance 2D field-effect transistors and microelectronic devices.